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[Embeded-SCM Develop] PicoBlazeSPIFlash

Description: PicoBlaze 处理器 SPI Flash 编程器的详细资料，可用作XILINX开发板的参考资料。-PicoBlaze processor SPI Flash programmer detailed information XILINX development board can be used as a reference.
Platform: | Size: 673792 | Author: cgc | Hits:

[Other] jmf602

Description: SATA接口SSD控制器介绍以及支持NAND FLASH列表，目前比较流行的低成本SSD方案．-SATA interface SSD controller and support for NAND FLASH, introduced a list of currently popular low-cost SSD program.
Platform: | Size: 247808 | Author: gxliu | Hits:

[VHDL-FPGA-Verilog] Am29lv160d

Description: 在逻辑的系统仿真中使用的FLASH模型（AMD的Am29lv160d），包括VHDL代码文件和verilog代码文件和testbench，并且有相应的pdf说明文档。-In the logic system used in FLASH simulation model (AMD s Am29lv160d), including VHDL and Verilog source code files of documents and testbench, and the corresponding pdf documentation.
Platform: | Size: 216064 | Author: 天策 | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_Lite_12_flash

Description: 实现如何在Nios II对Flash进行读写 [SOPC、Nios II、DE2] -Introduce how to read and write the Flash using Nios II[SOPC、Nios II、DE2]
Platform: | Size: 1096704 | Author: bobgeng | Hits:

[VHDL-FPGA-Verilog] NANDFLASH

Description: 用VHDL开发的NANDFLASH的读写程序,给出 NANDFLASH的时序正确的读写-NANDFLASH developed using VHDL to read and write the procedures, timing NANDFLASH give the correct reading and writing
Platform: | Size: 31744 | Author: mxc | Hits:

[Documents] flashmemory

Description:
Platform: | Size: 54272 | Author: changlu | Hits:

[VHDL-FPGA-Verilog] PROM

Description: 在FPGA设计中,从配置PROM/FLASH读取用户数据-PROM
Platform: | Size: 197632 | Author: zhongjian | Hits:

[Driver Develop] 123456

Description: NAND型Flash在大容量存储回放系统中的应用-Flash
Platform: | Size: 53248 | Author: zhongjian | Hits:

[ARM-PowerPC-ColdFire-MIPS] niossramflash

Description: 在altera FPGA ep3c25器件上实现niosii+sram+flash-Altera FPGA ep3c25 in devices to achieve niosii+ sram+ flash
Platform: | Size: 17807360 | Author: billfeng | Hits:

[Other] altera_avalon_cfi_flash

Description: 周立功SOPC 嵌入式系统实验教程书籍配套光盘 FLASH驱动代码-Embedded Systems Week Ligong SOPC experimental FLASH Tutorial CD-ROM drive books matching code
Platform: | Size: 32768 | Author: 周正波 | Hits:

[Documents] Memory

Description: 存储器类型介绍:SSRAM SDRAM Flash Memory EEPROM EPROM-Memory Introduction
Platform: | Size: 8192 | Author: Kim Zeng | Hits:

[VHDL-FPGA-Verilog] 03.EDK8.2

Description: 使用xilinx virtex4芯片，设计环境为EDK，其中包含uart,片外sram操作，flash操作，DDR SDRAM操作，MAC自发自收，audio，video等试验-Xilinx virtex4 use chip design environment for the EDK, which contains the uart, chip sram operation, flash operation, DDR SDRAM operation, MAC spontaneous self-admission, audio, video and other tests
Platform: | Size: 22821888 | Author: 肖姗姗 | Hits:

[VHDL-FPGA-Verilog] Fingerprint_Identify

Description: 本项目名称是：基于FPGA的指纹识别模块设计。 主要内容为：本模块采用xilinx公司的Spartan 3E系列XC3S500E 型FPGA作为核心控制芯片，通过富士通公司的MFS300滑动式电容指纹传感器对指纹图象进行提取，然后对提取的指纹图像进行灰度滤波、图像增强、二值化、二值去噪、细化等预处理，得到清晰的指纹图象，再从清晰的指纹图象中提取指纹特征点，存入外部FLASH作为建档模板。指纹比对时，采用同样的方法获得清晰的指纹图像，建立比对模板，然后将比对模板与建档模板利用点模式匹配算法进行比对，得出比对结果。该模块利用嵌入式软核实现系统的管理，利用硬件实现指纹识别，保证了系统功能的完整性与识别的正确性。该识别模块可用于门禁、考勤、安检、保险箱柜等很多方面，也可和计算机等设备联机使用，满足各个方面的不同需求，因此它的设计具有很广泛的应用前景和市场价值。 -The project name is: FPGA-based fingerprint identification module design. The main contents are: the use of this module xilinx s Spartan 3E Series XC3S500E FPGA-based control chip as the core, through the MFS300 Fujitsu fingerprint slide sensor capacitance extraction of the fingerprint image, and then extracted gray-scale fingerprint image filtering, image enhancement, binarization, denoising Second, refinement, etc. pre-treatment have been given clear fingerprint image, and then a clear fingerprint image from the extracted fingerprint feature points, into the external FLASH file as a template. Fingerprint matching using the same method to obtain a clear image of the fingerprint to establish than the template, and then will be the template file templates and the use of point pattern matching algorithm than the right, than the results obtained. The module is the realization of the use of soft-core embedded system management, the use of fingerprint recognition hardware implementation
Platform: | Size: 191488 | Author: xiaoxu | Hits:

[VHDL-FPGA-Verilog] 4NandFlash

Description: 基于verilog hdl 的Nand Flash控制代码-Verilog hdl-based control code of the Nand Flash
Platform: | Size: 2048 | Author: wxd | Hits:

[VHDL-FPGA-Verilog] RS_5_3_GF256

Description: 用于NAND FLASH CONTROLLER 中的 ecc 各个模块VHDL代码-NAND FLASH CONTROLLER for ecc modules in VHDL code
Platform: | Size: 197632 | Author: 陈佳宜 | Hits:

[VHDL-FPGA-Verilog] wb_flash_latest[1].tar

Description: flash 控制器，用verilog描述，希望对大家有帮助-flash controller!
Platform: | Size: 2048 | Author: 罗锋 | Hits:

[Embeded-SCM Develop] NAND_FLASH_simulation_model

Description:
Platform: | Size: 849920 | Author: andrew zhang | Hits:

[Embeded-SCM Develop] Flash

Description:
Platform: | Size: 1471488 | Author: dd | Hits:

[FlashMX] Nand_verilog

Description: NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array. To read, most of the word lines are pulled up above the VT of a programmed bit, while one of them is pulled up to just over the VT of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed.-NAND flash also uses floating-gate transistors, but they are connected in a way that resembles a NAND gate: several transistors are connected in series, and only if all word lines are pulled high (above the transistors VT) is the bit line pulled low. These groups are then connected via some additional transistors to a NOR-style bit line array. To read, most of the word lines are pulled up above the VT of a programmed bit, while one of them is pulled up to just over the VT of an erased bit. The series group will conduct (and pull the bit line low) if the selected bit has not been programmed.
Platform: | Size: 870400 | Author: anirudhh | Hits:

[VHDL-FPGA-Verilog] NAND_IP

Description: Nand flash VHDL code and Nand flash verilog code
Platform: | Size: 22528 | Author: psungil | Hits:
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